1. Field of the Invention
This invention generally relates to light emitting diode (LED) fabrication processes and, more particularly, to a method for fabricating three-dimensional (3D) gallium nitride structures with planar surfaces for use in LEDs.
2. Description of the Related Art
FIG. 1 is a partial cross-sectional view of a planar gallium nitride LED (prior art). Gallium nitride (GaN) is widely used for LED applications due to its favorable band-gap and direct band structure, and most fabrication follows a planar metalorganic chemical vapor deposition (MOCVD) sequence, as noted by Nguyen, X. L., Nguyen, T. N. N., Chau, V. T. & Dang, M. C., “The fabrication of GaN-based light emitting diodes (LEDs)”, Adv. Nat. Sci: Nanosci. Nanotechnol. 1, 025015 (2010), as follows:
1) A thick n-GaN with Si doping is deposited on a sapphire substrate;
2) A multiple quantum well (MQW) layer is formed consisting of alternating thin layers of InGaN and AlGaN; and,
3) A thin p-GaN layer is formed with Mg doping.
One of the constraints on this technology is the high cost of producing GaN for devices due to the difficulties encountered in forming a sufficient high-quality material. These difficulties primarily stem from the growth process, which is typically conducted at very high temperatures (e.g., over 1,000° C.) in molecular beam epitaxy (MBE) or MOCVD reactors and on substrates with a different coefficient of thermal expansion (CTE). The difference in CTE can lead to formation of threading dislocations that adversely affect device performance and reliability. In addition, film stress limits the amount of dopants that can be incorporated in a GaN film, which in turn limits the range of emission characteristics that are achievable. So it would be desirable to improve the defect density and increase the amount of device surface area that can produce LED emission for a given area of growth substrate.
FIGS. 2A through 2C are partial cross-sectional views of LED devices with textured surfaces (prior art). FIG. 2A depicts a planar LED, FIG. 2B depicts a flip chip LED, and FIG. 2C depicts a textured template LED. One other consideration of the planar LED structure is the high index of refraction of GaN, which limits the amount of light that can be emitted to a narrow angular cone. Light outside the escape cone is reflected internally, diminishing the efficiency of the device. A variety of ways have been devised to enhance the roughness of the encapsulation layer on planar devices as a means to allow more light to escape, see Fujii, T. et al., “Increase in the extraction efficiency of GaN-based light-emitting diodes via surface roughening”, Applied Physics Letters 84, 855 (2004), and the dry etch texturing study of Lee, H. C. et al., “Effect of the surface texturing shapes fabricated using dry etching on the extraction efficiency of vertical light-emitting diodes”, Solid-State Electronics 52, 1193-1196 (2008). Nanostructured surface coatings have also been used in a similar way to extract internal reflections (Kang, J. W. et al., “Improved Light Extraction of GaN-Based Green Light-Emitting Diodes with an Antireflection Layer of ZnO Nanorod Arrays”, Electrochem. Solid-State Lett. 14, H120-H123 (2011).
FIGS. 3A and 3B depict, respectively, a GaN micro-rod LED structure and a device fabricated from an array of micro-rod LEDs (prior art). One method to alleviate the problems with planar device fabrication is to use GaN nanowires or micro-rods (μ-rods). Such structures can be fabricated at high temperature with the appropriate shell structures to form a p-QW-n LED, harvested from the growth substrate, and deposited using a dielectrophoresis (i.e., e-field) process. GaN μ-rods provide a non-planar template, often in the form of a hexagonal or triangular rod, for the epitaxial growth of quantum well (QW) structures. The divergence from planar should provide a higher efficiency for light extraction. The diameter of the μ-rods and nanowires is typically small enough that the threading dislocation density is significantly reduced, increasing the internal quantum efficiency (IQE) and lifetime. By controlling the crystallographic orientation of the GaN μ-rods, non-polar or semi-polar planes can be used for device fabrication, thereby reducing the effect of the quantum confined stark effect (QCSE), which, in turn, can also lead to improvements in the IQE.
Several research groups have worked on the development of GaN nanowires to varying degrees of success. One approach that yields high-quality GaN nanowires was developed by UNM researchers, and uses MOCVD epitaxial growth from a templated substrate (S. D. Hersee, et al., “The controlled growth of GaN nanowires”, Nano Letters 6, 1808 (2006). This process yielded good nanowires with a constant diameter and a hexagonal cross-section with sidewall orientations in the (1100) family. However, the growth was limited to 2 μm per hour.
Other VLS-based growth processes have been developed using various catalysts (e.g., Ge, Au, or Fe), with resulting nanowires and nanorods being produced and fabricated into LED devices. The crystallographic orientation of VLS-grown GaN nanowires can be non-ideal, as there are competing preferred axial orientations for growth (a- and c-axis, depending on temperature), competing phases (zinc-blend and wurtzite), and the resulting nanowires can have non-uniform sidewall orientations. This can affect the uniformity of e-field dispersed GaN nanowires that are used for device fabrication.
It would be advantageous if a GaN LED could be fabricated with uniform sidewall orientations and a minimal density of defects.